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Inter-Processor FIFO Queue Specification

The Host's synthesis engine OA.ko and the panel control driver OmapNKS4Module.ko coordinate asynchronous data transfer using two hardware-synchronized FIFO ring-buffer queues. These queues manage the flow of 4-byte NKS4Command frames (see Protocol Command Payload Frame (NKS4Command)) between the synthesis scheduler and the coprocessor.

FIFO Inter-Processor Memory Map

The queue structures are allocated inside CSTGOmapNKS4Fifos::sInstance (located at offset +0x3B00 in the driver's BSS segment, spanning 0x518 bytes):

Ring Buffer Queue Transmission Vector Capacity (Entries) Word Size (Bytes) Driver Control API
Input FIFO Coprocessor → Synthesis Engine 256 4 OmapNKS4InputFifo_ReadCommand
Output FIFO Synthesis Engine → Coprocessor 64 4 OmapNKS4OutputFifo_WriteCommand

Input FIFO Queue Topology (Coprocessor to Host)

The Input FIFO buffers incoming real-time panel events (e.g., button presses, touch gestures, fader movements) forwarded from the Interrupt IN endpoint (EP1).

Queue Layout and Offsets

CSTGOmapNKS4Fifos::sInstance
├── +0x000 : Ring Buffer Queue Array (256 entries × 4 bytes)
├── +0x400 : Ring Buffer Write Index (uint32_t)
└── +0x404 : Ring Buffer Read Index (uint32_t)
  • Queue Mechanics: The Interrupt IN callback writes incoming 4-byte event frames to sInstance + (write_idx * 4) and increments the write index.
  • Host Read Routine: The synthesis engine polls the queue by invoking OmapNKS4InputFifo_ReadCommand(NKS4Command *cmd). This function compares the read and write indexes, copies the pending frame to the destination pointer, increments the read index, and returns 1. If no events are pending, it returns 0 immediately.

Output FIFO Queue Topology (Host to Coprocessor)

The Output FIFO buffers panel configuration requests, LED adjustments, and register writes generated by the synthesis engine before they are sent via the Bulk OUT endpoint (EP2).

Queue Layout and Offsets

CSTGOmapNKS4Fifos::sInstance
├── +0x408 : Ring Buffer Queue Array (64 entries × 4 bytes)
├── +0x508 : Ring Buffer Write Index (uint32_t)
└── +0x50C : Ring Buffer Read Index (uint32_t)
  • Write Routine: The synthesis engine queues a command by invoking OmapNKS4OutputFifo_WriteCommand(NKS4Command cmd). If the queue is full (write index plus one equals read index, modulo 64), the command is discarded, and the function returns 0. On a successful write, it increments the write index and returns 1.
  • Drain and Flush Mechanics: Once a command is queued, OA.ko invokes OmapNKS4Fifos_TriggerOutputInterrupt(). This function triggers SignalVideoMessageProcessor, alerting the Host's background USB writer thread. The writer thread drains the queue starting at the read index, writes the command frames to the Bulk OUT endpoint, and updates the read index.

Output Command Payload Typology

The Output FIFO processes several categories of system-level configuration commands destined for the coprocessor:

Command Category Functional Target Coprocessor Action
LED Control Panel switch backlight LEDs Modifies physical GPIO states (ON / OFF / BLINK)
Scanning Config Coprocessor matrix scanning mask Applies scanning properties to the matrix hardware
Virtual Codec NV2AC register configurations Configures DAC volume, routing, or clock settings
Graphics Commands Screen drawing commands Triggers framebuffer fill, pixel copy, or viewport select